Required reading: Chapter 4, 5, and 6 of Lion's
- Draw picture with multiple applications, kernel (another app), and hardware
- Goal: fault isolation between applications in picture
- stores shouldn't be able to overwrite other apps's data
- jmp shouldn't be able to enter another application
- Method: give each applications its own address space. That is,
provide each application with the ideas that it has a complete
memory for itself. all the addresses it issues are its
addresses (e.g., each application has an address 0).
- Why does this work? load/stores/jmps cannot touch/enter another
- How do you give each application its own address space?
- Insert a memory management unit (MMU) between processor and memory
- MMU translates virtual address to physical addresses using a
- Implementation approaches for translation table:
- for each virtual address store physical address (costly)
- translate a set of contiguous virtual addresses at a time using
segments (segment #, base address, length)
PDP-11 example: page address
register (PAR) and page descriptor register (PDR). Note that
physical addresses (18 bits) are bigger than virtual addresses (16
- translate a fixed-size set of address (page) at a time using a
page map (page # -> block #) (draw hardware page table picture).
Datastructures for page map: array, n-level tree, superpages, etc.
Some processor have both 2+3: x86!
- What if two applications want to share real memory? Map the
physical address twice, once in each address space
- How do you give an application access to a memory-mapped-IO
device? Map the physical address for the device into the
applications address space
- How to manage address spaces? That is, switching, creating,
deleting, growing, mapping devices in, etc. Reuse the address ideas:
have one address space that includes all others. This special address
spaces can manage all address spaces then. This special address space
is called the kernel address space. How to protect the kernel?
- If kernel is unprotected, every application can access kernel
page map, and thus all others.
- Extend processor with mode bit (user, kernel)
in kernel mode, application change change mode bit to user
in user mode, applications are prohibited to change mode bit
and to change address spaces
in kernel mode, processor always runs in kernel address space
- If user application wants to change address spaces, it has
to ask the kernel. Next lecture we will see how.
PDP-11 stores kernel/user mode in processor status word
(PSW), PS in v6 code. PDP-11/40 two set of 8 segmentation
registers, one for user mode, one for kernel mode. (On 11/40:
also two copies of sp register.)
- How do you get off the ground?
- when computer starts, MMU is disabled.
- computer starts in kernel mode, with no
translation (i.e., virtual address 0 is physical address 0, and
- kernel program sets up MMU to translate kernel address to physical
address. often kernel virtual address translates to physical adress 0.
- enable MMU
Lab 1 and the Lion's chapters for today explores this topic in detail.
Case study (Lion's book)
- You will need to read most of the source code multiple
times. Your goal is to explain every line to yourself without
using the commentary. Read it one or multiple times with
Lion's commentary until you reach the goal
- PDP-11 assembly (8 general register, pc (r7), sp (r6),
environment (r5)) r0, r1 used for results
- JSR intruction:
- JSR rn, label:
1. rn <- pc+1; 2. pc <- dst; 3. mov rn, -(sp)
- JSR pc, label:
1. mov pc+1, -(sp); 2. pc <- label
- We covered the lines 612 through 647, setting up the kernel
virtual address space. These lines are explained by Lion in
Chapter 6, but the accompanying
picture may be helpful, since it depicts the end result.